Summary: Functional Verification Mapping

Joachim Schlosser: Development and Verification of fast C/C++ Simulation Models for the Star12 Microcontroller

Table 2.2:

Functional Verification Mapping

Verification Step	Verification Technology	Models



Hardware Intent	Simulation	Functional
		Behavioral
		RTL

	Emulation	RTL

	Model Checking	RTL

	Theorem Proving	RTL

	Physical Prototype	Behavioral
		RTL
		Logic

	Virtual Prototype	Functional

	Code Coverage	RTL
Software Intent	Hardware/Software Co-Verification	Behavioral
		RTL

	Emulation	RTL

	Physical Prototype	Behavioral
		RTL
		Logic
Hardware Equivalence	Simulation	Functional
		Behavioral
		RTL
		Logic
		Gate
		Switch
		Circuit

	Emulation	RTL

	Equivalence Checking	RTL
		Gate

	Fault Coverage	Gate

	Physical Verification	Geometric database
		Circuit
		Switch
		Gate
Software Equivalence	Hardware/Software Co-Verification	Behavioral

	Emulation	RTL

	Physical Prototype	Behavioral
		RTL
		Logic