Joachim Schlosser: Development and Verification of fast C/C++ Simulation Models for the Star12 Microcontroller
Now, with the increasing number of transistors placed on a chip, it is possible to integrate multiple ICs in a single chip. No additional integration board is needed; all the chips usually needed for a system can be pooled. The result is a compact unit that is relatively insusceptible to environmental influences and can easily become part of a bigger system, without many requirements with respect to space and power. The signal propagation delay becomes shorter because the different components are nearer to each other. These highly integrated devices have different names, they are referred to as System-on-Chip (SoC), system-ASIC, systems-on-a-chip or System Level Integration (SLI) devices. [VSI01b]
A number of 20 or more ICs integrated on a single chip now is nothing unusual. As mentioned before, this has great advantages regarding cost and robustness. But with more and more chips developed for the consumer electronics business, there is also a problem emerging from this: consumer electronics products change very quickly, and with this shorter product time-to-market also the cycles for the SoCs are shrinking. As the complexity of these SoCs does not shrink but in fact explodes, the gap between the demands of the consumer electronics vendors and the abilities of the engineering community and its tools is becoming larger. It is an expanding dilemma between what is theoretically possible by technology and what can practically be done with the human and financial resources staying at the same level. The same number of engineers has to spend the same or even less money as in the past but develop more complex systems in a much shorter time.
It becomes quite apparent that it is impossible and unnecessary to develop a new chip from scratch each time. Parts of the old chips can be reused, thus splitting a chip logically into pre-designed blocks, as it was done long time using off-the-shelf ICs on printed circuit integration boards [VSI01b]. The pre-designed blocks now are not used in form of chips that are assembled onto one board, but they are a form of Intellectual Property, variously referred to as IP, IP blocks, cores, system-level blocks (SLB), macros, system level macros (SLMs). The Virtual Sockets Interface Alliance (VSIA) – an organization introduced in the following section – gives these pre-designed blocks the name Virtual Components (VCs).
The IP blocks are the replacement of the former chips. They are virtually combined long before the actual manufacturing, instead of physically assembling them. A whole system is manufactured at once, in a solid product. This change in design and production process leads to another problem: It is not possible to relatively easy change layout or function of a system after the chips are produced. With several chips residing on one integration board it is not an unsolvable situation to change the arrangement of ICs. Simply print a new board and that’s it. With SoC the situation is different. All ICs are on one chip. If anything changes, you cannot use chips any more, produced before the change. A new layout has to be generated, new masks, a new production process has to be elaborated, with all the cost and time disadvantages. Whereas with boards it was possible to assemble the ICs on a bigger board for verification and testing, producing a chip just for verification and testing is a major expense factor and so the number of different verification chips has to be kept as small as possible.