Last week you saw the post on simulation helping in smart grid and energy revolution, including a video interview, held at Electronica Trade Fair. This week, you get another video interview on obsolescence of electronic components, and how Simulink can help to mitigate the risk implied with components being discontinued.
The interview with Wolfgang Patelay appeared on Embedded News TV.
Technology obsolescence of electronic components means that manufacturers of processors, peripherals, memory etc. over time come up with new products and thus discontinue the old ones . Mass products that use these components face the challenge of those components being no longer available, and so have to deal with that. Solutions range from stocking large piles of components while they are still produced, over finding other suppliers that can license and manufacture the identical device to change down to actually changing port the design to use other components.
Obsolescence in this context does not refer to the bad practice of planned obsolescence of devices showing functional failure after a certain duration of operation where the technology would allow for much longer lifetime at the same price.
Porting designs to new components clearly has the advantage that you can at the same time upgrade functionality of your product, but bears the disadvantage that the effort of porting hardware designs and embedded C code is high.
Using Simulink & Stateflow and the Model-Based Design methodology around it allows to step back from directly implementing things on a certain hardware architecture. Using models to create and simulate designs, and then automatically generate C code, C++ code  or HDL code for FPGA and ASICs  from Simulink and Stateflow significantly reduces the effort and risk of porting applications to new architectures. Code verification for run-time errors  finally eliminates the remaining risk when re-using existing c code.
 Diminishing manufacturing sources and material shortages. Wikipedia. License CC-BY-SA
 Embedded Code Generation. MathWorks
 FPGA Design. MathWorks
 C Code Verification for Run-Time Errors
Photo: Ioan Sameli on Flickr, License CC-BY-SA