With more and more transistors residing on a single chip, accomplishing more and more functions, chip development becomes more challenging. New technologies emerge in shorter cycles, and devices have to be thrown on the market faster. For software engineers in the embedded controller sector this means their programs must not delay this process. Therefore it is vital to be able to write software even before the chip is available as hardware. And this brings simulation technology in account. With advanced simulators, it is possible to write even complete operating systems, including low-level drivers, without having the device in silicon. Full-chip simulation is the buzzword, meaning that not only the CPU of a system is simulated, but also its peripherals like network interfaces and I/O devices.
This diploma thesis engages in writing parts of a simulator. The first one is the development of two peripherals of a current CPU, modeled to be used in a simulator. The second part was the implementation of an interface between a simulator engine and a general-purpose simulation application. The peripherals’ models are a step forward to have all peripherals of the particular CPU available for simulation, while the interface allows a complete system test with all timings and functionality, including software as well as network systems, without the need for any piece of the target hardware to be present.
But before diving into the details of implementation, all necessary theory background is given. The theory part gives a deep view inside simulation technology used in the practical experience part. Many important terms are introduced, like models, model managers, simulators, taxonomy, classification, abstraction, interface, only to mention a few. A concrete implementation for a simulator backplane is presented, which is also used for the practical part. There exists a refined taxonomy, a classification scheme for categorizing models that regards several categories, like time and data representation. It was created by the Virtual Socket Interface Alliance. A standard, named Open Model Interface, for interfaces between models of hardware components and applications, is available by the IEEE consortium. Of course, verification is an important subject. Different reasons and methodologies for testing are known and presented in the thesis. The concrete implementation documentation shows the modeling of two peripherals of a micro controller, and an adaptation layer between an application and the concrete simulator engine implementation.
The full text is freely available as Web-Version: Diploma Thesis: Development and Verification of fast C/C++ Models for the Star12 Micro Controller